Quartus FAQ


Altera Qsys Erfahrungen
em4fun Altera DE0-Nano



Error (176310): Can't place multiple pins assigned to pin location Pin_D1 (IOPAD_X0_Y37_N7)
	Info (176311): Pin epcs_config_asd0_o is assigned to pin location Pin_D1 (IOPAD_X0_Y37_N7)
	Info (176311): Pin ~ALTERA_ASDO_DATA1~ is assigned to pin location Pin_D1 (IOPAD_X0_Y37_N7)


Use SOPC or Qsys and add “EPCS Serial Flash Controller”

error: can’t place multiple pins assigned to pin location


Qsys: Warning: No matching role found


You may safely ignore these messages for Altera components because the signals are not required for design operation.
Qsys: Warning: No matching role found


Info (209060): Started Programmer operation at Fri Jan 24 15:27:32 2014
Info (209016): Configuring device index 1
Info (209017): Device 1 contains JTAG ID code 0x020F40DD
Error (209014): CONF_DONE pin failed to go high in device 1
Error (209012): Operation failed
Info (209061): Ended Programmer operation at Fri Jan 24 15:27:38 2014


Reset Hardware or
Error (209014): CONF_DONE pin failed to go high in device
Why do I receive the error ‘CONF_DONE pin failed to go high in device X’ when I try to JTAG configure my Altera FPGA using the Quartus II software and a download cable?


Remove VHDL commentar from component declartion


RegEx Code

[ -]*[ .][a-z0-9_.]*$
[ -]*\w[a-z0-9_]*$


Warning- "Properties (isMemoryDevice) have been set on interface uas - in composed mode these are ignored"


This warning means that the NIOS® II software tools may not see the isMemoryDevice assignment which will make it harder in the GUI to choose memory addresses at this range as being valid to store boot data
Warning- “Properties (isMemoryDevice) have been set on interface uas – in composed mode these are ignored”


component nios is
    port (
        bridge_cfi_flash_read_n         : out   std_logic_vector(0 downto 0);
Error (10476): VHDL error at dionysos_top.vhd(238): type of identifier "flash_oe_n_o" does not agree with its usage as "std_logic_vector" type
Error (10558): VHDL error at dionysos_top.vhd(238): cannot associate formal port "bridge_cfi_flash_read_n" of mode "out" with an expression


Generate as Verilog, edit componen from std_logic_vector to std_logic!
Tri-state conduits and VHDL component
Qsys and tristate bridge

Wrong Answer

Re-create Qsys tree. Updating from earlyer versions (ex. 12.1) to current version (13.1) is NOT safe!


/opt/altera13.1/nios2eds/bin/sof2flash: 6: /opt/altera13.1/nios2eds/bin/sh_jar.sh: Bad substitution



Why does sof2flash, elf2flash,elf2hex and bin2flash fail from Quartus II 13.1 when run on a Windows PC?



Why does sof2flash, elf2flash,elf2hex and bin2flash fail from Quartus II 13.1 when run on a Windows PC?

Installation of Quartus 13.1


# ./setup.sh 
bash: ./setup.sh: /bin/env: bad interpreter: No such file or directory


# ln -s /usr/bin/env env


# ./setup.sh 

You must have the 32-bit compatibility libraries installed for the Quartus II installer and software to operate properly.


Ubuntu apt-get install ia32 for 32-bit on 64-bit
Installing 32-bit libs on a 64-bit Linux system

$ sudo dpkg --add-architecture i386
$ sudo apt-get install lib32z1
$ sudo apt-get install gcc-4.9-base:i386 libc6:i386 libgcc1:i386 libx11-6:i386 libxau6:i386 libxcb1:i386 libxdmcp6:i386 libxext6:i386
$ sudo apt-get install fontconfig:i386 libexpat1:i386 libfontconfig1:i386 libfreetype6:i386 libpng12-0:i386 zlib1g:i386


How to synthesis the whole project or just some VHDL files in the command-line?


Using Quartus from command line

Quartus-II Handbook Version 13.0, page 2-10 (or search ASSIGNMENT_FILES)
==> produces one example Makefile

$ quartus_map --help=makefiles


$ PATH=$PATH:/opt/altera/13.0/quartus/bin
$ quartus_map binary_ops_00000000 --source=binary_ops_00000000.v --family="Cyclone III" 
$ quartus_fit binary_ops_00000000
$ quartus_eda binary_ops_00000000 --formal_verification --tool=conformal
$ cp -v fv/conformal/binary_ops_00000000.vo output.v

Generating a System for Synthesis or Simulation – Generating a Qsys system using the command-line
Knowledge Base: Can I open the Qsys tool from the Command line?
Qsys Scripts
Qsys on 64-bit Linux error
Quartus II Tcl Example: Automatic Script Execution

$ <Quartus II installation directory>\quartus\sopc_builder\bin\ip-generate --help
$ <Quartus II installation directory>\quartus\sopc_builder\bin\ip-make-simscript --help
$ <ACDS install directory>\quartus\sopc_builder\bin\qsys-edit
$ qsys-script 
$ qsys-generate <QSYS-file> --family=""


How to use SVN revision and current time in VHDL.


Use TCL-script
Quartus II Tcl Example: Get Subversion Revision Number

$ quartus_sh.exe -t svn_version.tcl
Info: Command: quartus_sh -t svn_version.tcl
Info: Revision for ../.. is 658
Info: Build time 1425395821
Info (23030): Evaluation of Tcl script svn_version.tcl was successful
# this .tcl script is from http://www.altera.com/support/examples/tcl/tcl-svn-revision.html

proc get_subversion_revision { file_name } {

    global done

    # The maximum number of seconds to wait for the svn info
    # command to complete
    set timeout_seconds 30

    # The svn info command with filename that is run (the ./trunk/hdl directory)
    set cmd "svn info ../.."

    # Attempt to get the version information.
    # If the command can't be run, return an error.
    # Otherwise set up a file event to process the command output.
    if { [catch {open "|$cmd"} input] } {
        return -code error $input
    } else {

        fileevent $input readable [list get_revision_info $input ]

        # Set up a timeout so that the process can't hang if the
        # repository is down.
        set timeout [after [ expr { $timeout_seconds * 1000 } ] \
            [list set done -1] ]

        # Don't continue until the revision number is found,
        # or the operation times out. Cancel the timeout anyway.
        vwait done
        after cancel $timeout

proc get_build_time { } {

    global build_time
    global tcl_platform
    set timeout_seconds 30

    set OS [lindex $tcl_platform(os) 0]
    if { $OS == "Windows" } {
        post_message "Build on Windows: use batch file"
        set cmd "build_date_win32.bat"
    } else {
        post_message "Build on Linux: use date"
        set cmd "date +%s"
    if { [catch {open "|$cmd"} input] } {
        return -code error $input
    gets $input build_time

proc get_revision_info { inp  } {

    global done revision_number

    if { [eof $inp] } {
        catch {close $inp}
        set done 1
    } elseif { $done } {
        gets $inp line
    } else {
        gets $inp line
        # Use a regular expression to match the line with the
        # revision number.
        if { [regexp {^Revision:\s+(\d+)\s*$} $line match revision_number] } {
            set done 1

set path $::env(PATH)
post_message "PATH = $path"

set done 0
set revision_number ""
set build_time ""

# The file name is usually your project file .qpf
set file_name "../.."
#set file_name [lindex $quartus(args) 1]

if { [catch { get_subversion_revision $file_name } msg] } {
    post_message -type critical_warning "Couldn't run command to get revision number. $msg"
} else {

    if { -1 == $done } {
        post_message -type critical_warning "Timeout getting revision number."
        set revision_number "0"
    } elseif { [string equal "" $revision_number] } {
        post_message -type critical_warning "Couldn't find revision number in output of svn info $file_name."
        set revision_number "0"
    post_message "Revision for $file_name is $revision_number"
    if { [catch { get_build_time } msg] } {
        post_message -type critical_warning "Couldn't run command to get build time: $msg"
    post_message "Build time $build_time"
    #create file, overwite if already existing
    set output [open "../../common_source/core/pm_revision_number.vhd" w]
    puts $output "LIBRARY IEEE;"
    puts $output "USE IEEE.STD_LOGIC_1164.ALL;"
    puts $output "USE IEEE.NUMERIC_STD.ALL;"
    puts $output "PACKAGE pm_revision_number IS"
    puts $output ""
    puts $output "CONSTANT ci_rev_num     : integer := $revision_number;"
    puts $output "CONSTANT ci_build_time  : integer := $build_time;"
    puts $output ""
    puts $output "END PACKAGE;"
    puts $output ""
    close $output
Info: Command: quartus_sh -t svn_version.tcl compile TCC_PTP_v2 TCC_PTP_v2_top
Info: Quartus(args): compile TCC_PTP_v2 TCC_PTP_v2_top
Info: PATH = c:\altera\14.1\quartus\bin64\;c:\altera\14.1\quartus\bin64\;C:\Windows\...
Info: Revision for ../.. is 658
Critical Warning: Couldn't run command to get build time: couldn't execute "date": no such file or directory
Info: Build time 
Info (23030): Evaluation of Tcl script svn_version.tcl was successful

No PATH to C:/altera/14.1/quartus/bin64/cygwin/bin !!! ==> no date

Scripting and Options for quartus_sh
Run common TCL script on Windows and Linux
what is the windows equivalent of the command “date+%s”

:UnixTime  [ReturnVar]  [TimeStamp]
:: Computes the Unix time from the current local time as reported by the
:: operating system. The Unix time is the number of seconds that have elapsed
:: since midnight Coordinated Universal Time (UTC), January 1, 1970, not
:: counting leap seconds.
:: The result is returned in variable ReturnVar,
:: or the result is echoed if ReturnVar is not specified
:: If the TimeStamp is provided in the 2nd parameter, then the Unix time for
:: the TimeStamp is computed, rather then for the current time.
:: The TimeStamp must have the same format as used by WMIC:
::   YYYYMMDDhhmmss.ffffffSzzz
:: where:
::   YYYY   = gregorian year
::   MM     = month
::   DD     = day
::   hh     = hour in 24 hour format
::   mm     = minute
::   ss     = seconds
::   ffffff = fractional seconds (microseconds)
::   S      = timezone sign: + or -
::   zzz    = timezone: minutes difference from GMT
:: Each component must be zero prefixed as needed to maintain the proper width.
:: The ReturnVar parameter must be provided in order to use the TimeStamp.
:: A ReturnVar of "" will function the same as no ReturnVar. This enables the
:: specification of a TimeStamp without an actual ReturnVar.
@echo off
set "ts=%~2"
if not defined ts for /f "skip=1 delims=" %%A in ('wmic os get localdatetime') do if not defined ts set "ts=%%A"
set /a "yy=10000%ts:~0,4% %% 10000, mm=100%ts:~4,2% %% 100, dd=100%ts:~6,2% %% 100"
set /a "dd=dd-2472663+1461*(yy+4800+(mm-14)/12)/4+367*(mm-2-(mm-14)/12*12)/12-3*((yy+4900+(mm-14)/12)/100)/4"
set /a ss=(((1%ts:~8,2%*60)+1%ts:~10,2%)*60)+1%ts:~12,2%-366100-%ts:~21,1%((1%ts:~22,3%*60)-60000)
set /a ss+=dd*86400
endlocal & if "%~1" neq "" (set %~1=%ss%) else echo %ss%
exit /b


Identitäts-Komparatoren (engl. Identity Comparator)
Größen-Komparatoren (engl. Magnitude Comparator)

Komparator (Digitaltechnik)
SN74LS682 – 8-Bit Identity/Magnitude Comparators

How to use dedicate carry in and cascade chain in Altera FPGA?
n-bit generic magnitude comparator
Magnitude Comparator (arithmetical) Generator

Altera: Advanced Synthesis Cookbook
Altera: Logic Elements and Logic Array Blocks in Cyclone IV Device
Altera-Provided Logic & Symbol Libraries
Altera VHDL & Verilog HDL alt_mf Logic Function Library

Lesson 36 – VHDL Example 20: 4-Bit Comparator – Procedures

Parallelized magnitude comparator
N-bit comparator


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